Because a wide-gap semiconductor material typified by silicon carbide (abbreviated as SiC hereinafter) has higher dielectric breakdown electric field strength than that of a silicon (abbreviated as Si hereinafter) semiconductor material, it can realize a higher withstand voltage with the same impurity concentration as Si. Further, because SiC has a high withstand voltage while maintaining a low loss, operates at a high temperature of 250° C. or more, has an advantage of an excellent thermal conduction, it is expected as a material for a next generation power semiconductor.
In the “Proceedings of the 10th International Symposium on Power Semiconductor Devices & ICs” published in 1998 it is described a power MOS FET using SiC, and having a structure shown in FIG. 15 in pages 119 to 122. This power MOS FET is called as a trench gate type MOS FET, and an n-type drift layer 102 is formed on an n-type SiC semiconductor substrate 101 using epitaxial method. A p-type body region 103 is formed on the n-type drift layer 102, and n-type source regions 104 are formed on predetermined regions on the p-type body region. Recesses 110 are formed from the n-type source regions 104 and the p-type body region 103 to the n-type drift region 102, and gate electrodes 106 are formed in the recesses 110 through gate insulation films 105. A source electrode 107 is formed on the n-type source regions 104. A drain electrode 108 is formed on the bottom surface of the n-type SiC semiconductor substrate.
A channel for flowing carriers is formed between a source S and a drain D as follows. A voltage is impressed on the gate electrodes 106, and an electric field is applied to the gate insulation films 105 sandwiched between the gate electrodes 106 and the p-type body region 103 at sidewall parts of the recesses 110. As a result, the conductive type at surface parts of the p-type body region 103 in contact with the gate insulation films 105 is inversed to n-type, and the channel is formed. This structure provides a performance exceeding a theoretical limit of the Si power MOS FET, namely an on-resistance as low as 311 mΩ cm2 per unit area with a withstand voltage of 1400 V.
Recently, high withstand voltage power ICs which are formed by integrating a control circuit and a protection circuit with a high withstand voltage power output element have been developed and realized, and contribute to reducing size and increasing intelligence of high withstand voltage semiconductor devices. Bipolar semiconductor devices typified by an IGBT and a thyristor are getting attentions in terms of increasing low loss property as the types of output elements for the high withstand voltage power ICs. The bipolar semiconductor devices use an effect of conductivity modulation to largely reduce an internal resistance of a semiconductor device compared with monopolar semiconductor devices typified by a MOS FET and an SIT, and have an advantage of largely increasing low loss property. While there are a vertical structure and a horizontal structure as structures of the high withstand voltage power output elements, the vertical structure is mainly adopted because of ease of combining with a control circuit, and integration. FIG. 16 shows an IGBT having a typical horizontal structure, and constituted using Si, and is disclosed on pages 101 to 104 in the “Proceedings of the 8th International Symposium on Power Semiconductor Devices & ICs” held in 1996.
A SiO2 insulating film 213 is formed on a Si substrate 201, and then and an n-type drift region 202 are laminated in the IGBT. A p-type body region 204 is formed on the right end of the laminated drift region 202, and an n-type emitter region 205 and a p-type contact region 214 are formed in it. An emitter electrode 218 is formed in the emitter region 205, and a base electrode 220 is formed in the contact region 214. A gate electrode 211 is provided on the p-type body region 204 thorough a gate oxide film 210. An n-type buffer region 206, a p-type collector region 207, and an anode electrode 219 are sequentially provided on the left end of the drift region 202.
The following section describes an operation of the IGBT when it is off. A high voltage is impressed such that the electric potential of the anode electrode 219 is higher than the electric potential of the emitter electrode 218. In this state, a junction formed between the p-type body region 204 and n-type drift region 202 is inversely biased, and a depletion layer extends mainly in the n-type drift region 202. An electric filed in the depletion layer is maximum in a neighborhood of the junction, and gradually decreases toward the n-type buffer region 206. When the impressed voltage increases further, the depletion layer further extends toward the n-type buffer region 206, and the maximum electric field in the neighborhood of the junction increases as well. An impressed voltage, which generates the maximum electric field reaching a dielectric breakdown electric field of SiC of about 0.3 MV/cm, is the breakdown withstands voltage of this IGBT.
The following section describes an operation for an on state. A voltage is impressed such that the electric potential of the anode electrode 219 is higher than the electric potential of the emitter electrode 218. In this state, when a voltage higher than a threshold voltage is impressed on the gate electrode 211, electrons are concentrated on the surface of the p-type body region 204 under the gate electrode 211, and an inversion layer is formed. As a result, electrons flow from the n-type emitter region 205 through the inversion layer. A part of the electrons reaches the n-type buffer region 206 through the n-type drift region 202, and induces an infusion of positive holes from the p-type collector region 207. The infused positive holes reach the p-type body region 204 through the n-type drift region 202, and flow out from the emitter electrode 218. In this state, both the electrons and the positive holes exist in the n-type drift region 202, and a conductivity modulation occurs. This drastically can reduce the resistance in the drift region. As a result, a semiconductor device can provide a low on-resistance, namely a low loss while it has a higher withstand voltage than a MOS FET.
The breakdown voltage is 340 V and the current-carrying capacity is 2 A for the present prior art. The on-voltage at a current density of 200 A/cm3 is 2.0 V, and the on-resistance in a voltage range higher than the built-in voltage is 46.6 mΩcm2.
When a semiconductor device is applied to an industrial high capacity inverter, an inverter for the electric railway such as the New Trunk Line and electric trains, and an electric power conversion system for the power industry, an inverter with a higher withstand voltage, and a lower loss is necessary. However, if a trench gate type MOS FET shown in FIG. 15 is used to increase the withstand voltage, it is necessary to reduce the impurity concentration in the drain region, to extend the depletion layer, and to reduce the electric field. As a result, the resistance in the drain region increases, the on-resistance increases when the semiconductor device is turned on for flowing a current, and reducing the loss becomes difficult. The electric field tends to concentrate at the bottom of the recess 110, and it is difficult to increase the withstand voltage. For a semiconductor device using SiC or Si, because the dielectric breakdown electric field is high, generally, the impurity concentration is increased in the drift layer 102, and the on-resistance is decreased. However, in that case, the electric field increases in the gate insulation film 105 at the bottom of the recess 110, and it is difficult to increase the withstand voltage.
The Si-IGBT shown in FIG. 16 has a low breakdown voltage, and is deficient in the withstand voltage for applying to an industrial high voltage inverter, an inverter for the electric railway such as the New Trunk Line and electric trains, and a high voltage electric power conversion system for the power industry, and it is necessary to increase the withstand voltage further. When the structure in FIG. 16 is used to increase the withstand voltage, it is necessary to decrease the impurity concentration in the drift region 202, to extend the depletion layer, and to decrease the electric field. However, this increases the resistance of the drift region 202, the on-resistance increases when the semiconductor is turned on, and a current flows, and it is difficult to reduce the loss. For example, when the breakdown voltage is 1000 V or more, the on-resistance is 400 mΩcm2 or more in a voltage range higher than the built-in voltage, and when the breakdown voltage is 2000 V or more, the on-resistance is 2500 mΩcm2 or more.